Non-volatile memory devices using graphene and ferro-electric thin filmsTechnology #oezyilmaz-b-01
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Non-volatile memory devices using graphene and ferro-electric thin films
graphene memory device
in commercial development
NUS Ref: Oezyilmaz B 01Contact: Tan Yan Ny (firstname.lastname@example.org)
(+6566012812) OR email@example.com
Inventors: OEZYILMAZ, Barbaros
This technology relates to graphene-ferroelectric non-volatile memory devices.
Presently, non-volatile memories are dominated by NAND technology. However, they have limitations such as slow random access time, limited write-erase cycles and block erasures. Further, NAND requires high voltage for writing and erasing processes and is heavily reliant on CMOS technology which has reached its limit in speed and size.
For this technology, a new approach to solve these drawbacks in a single process based on ferroelectric polymer coating of large-scale CVD graphene is proposed. This polymer-graphene memory device utilizes the huge resistance change in the graphene which is dependant on the polarization effect of the programmable ferro-electric polymer. By employing this technology, a clear delineation of the data values represented by the resistance states is achieved – a resistance change ratio is greater than 500%.
Figure 1(a): Perspective cutaway schematic of the memory cell
Figure 1(b): Graph showing the hysteresis loop of graphene resistance versus gate voltage for a graphene-ferroelectric memory cell with a gate voltage sweep between -85 V and 85 V.
Scalable synthesis method
- Excellent mechanical flexibility